All posts by Chris

The SPIE Advanced Lithography Symposium – Day 5

When Friday morning of SPIE week rolls around, it feels like my brain is completely full. Even the half-day of conference left seems too long. In the Optical Lithography conference, Friday morning is traditionally the “tool” session, and the first tree talks were by Nikon, Canon and ASML giving their roadmap status reports. While the topics were interesting, I found myself fascinated instead with a different lesson they were teaching me: How to Lie with Graphs. Much of the data was of the sort to show how some parameter was either very high (uptime), or very low (overlay error), or very stable (immersion fluid temperature). To “enhance” the desired impression of high, low, or unchanging, the range used for the y-axes of graphs can be properly manipulated. So, if defect densities range from 0.05 to 0.11 per square centimeter, make the graph go from 0 to 0.3. Thus, all the number seem low. For uptime, with numbers ranging from 85% to 95%, make the graph got from 0 to 100 so that all the results seem high (you can also use a bar chart so it is not as obvious that the bottom 80% of the graph is unused). But my favorite is the CD uniformity wafer contour plot. If the data has a mean of 40 nm and a three sigma of 2 nm, make the contour range go from 32 nm to 48 nm so that only two or three contour colors are actually used, making the wafer data seem smooth as silk. Common guys – you should know better than that.

I am glad that I stay through most of the morning, though, because I saw my favorite paper of the conference. Lieve Van Look of Imec gave a great talk on matching scanners to enable their use for a given OPC’ed mask. A tremendous amount of work was shown, with clear analysis and well supported conclusions. Good work.

Becoming a Lithographer, part 3

After graduating with my bachelors degrees in 1982, I spent the summer working in an optics lab at the National Security Agency and then went off to CalTech to work towards a degree in applied physics. But a funny thing happened on my way to a PhD. I got married (not a particularly wise decision for me at the age of 22) and realized I needed a break from school after four intense years as an undergrad. One semester at CalTech was enough – I dropped out. But now I needed a job.

Since I had spent the previous summer at NSA, I decided to call someone I knew in their HR/Recruiting office about the possibility of a permanent job. After a few phone interviews, I got a job offer from a brand new group – the Microelectronics Research Lab. I hopped on a plane to start a new career and a new life in Maryland.

There is something important to know about working for the NSA – it requires a Top Secret Special Intelligence security clearance. Such a clearance is not trivial to get. One takes a battery of psychological exams, personality tests, and a particularly unpleasant lie detector test. A very thorough background check is done, including interviews with friends, neighbors, teachers, etc. The whole process takes at least nine months, and typically one year. Fortunately, I had just gone through this ordeal in order to get my temporary job the previous summer. Thus, I already had a clearance. When I arrived at the beginning of February, 1983, they even let me skip the two week orientation class and I went straight to my new boss’s office.

Why is all of this important? My new boss didn’t realize that I already had a clearance, and so was expecting me to show up for work in about a year. She had not even begun to think about what I was supposed to do and how I would fit into the group. She gave me some busy work while she pondered my fate. In the meantime, another young engineer in the group noticed my boredom and took pity on me. He was trying to work on etch and deposition (though we were in a very crude lab – our clean room would take a few years to build), and had recently ordered a very small, very manual contact printer (almost a toy, really) so that he could make himself some test patterns. The contact printer arrived the week that I showed up, and to give me something to do, he pointed me to the box. Even though I couldn’t spell it, that week I become a lithographer.

I often wonder what might have happened to me and my life if a different piece of equipment had shown up that week – an electrical prober, or a wafer cleaner, maybe. In hindsight, it seems that lithography was ideal for my educational background and my temperament – something that could have been a perfect plan rather than a perfect fluke. And while my marriage (the thing that sent me into this job) did not last but a few years, lithography has stuck with me for 25 years. Go figure.

By the way, while I was waiting for our clean room to be built (don’t expect things to move fast in the government), I decided the best way to learn about lithography was through simulation. I read Rick Dill’s 1975 papers and fell in love with the idea of lithography simulation. I started to write my own simulator that summer. As they say, the rest is history.

The SPIE Advanced Lithography Symposium – Day 4

In any symposium with as many papers as this one, there are bound to be some very good papers, and some not-so-good papers. Thursday was the day I saw several not-so-good ones. The problem was a common one: the author gives a paper not realizing that essentially the same paper was given at this conference several years ago by someone else. It’s inevitable, given that we have now over 650 papers published in the proceedings of the various conferences of this symposium, and the total number of papers published over the years just at this symposium has to be approaching 10,000. It’s inevitable, but still it should be rare. Given that good on-line search tools are now available on the SPIE website, it is usually not that hard to find and read previous papers on the same topic as one’s current work. The number of redundant papers should be much smaller than it currently is, so I suspect that most authors (and I am sometimes guilty here as well) are being lazy and not doing the literature search that is demanded of anyone that wants to publish a good paper.

This year, I had to do something I have never done before – I withdrew my paper from the conference at the last minute. It was a poster paper, so the disruption to the conference was minimal. Still, I am disappointed in myself. I think many authors have faced similar dilemmas: when submitting an abstract in August, predict what data will be available and what work can be done by the next February. It’s easy to guess wrong, and often the final paper is much different from what was envisioned (and described) in the original abstract. For me, the problem was this: I didn’t do the work required to make this paper sufficiently distinct from a previous publication on which this one was to be based. Such incremental papers are common, and it is the responsibility of the author to ensure that there is enough new to justify an additional publication. I could have published something that was just a little different from my past paper, but I knew I would have been wasting the time of any potential reader. Pulling a paper at the last minute is not good, but publishing a paper that doesn’t deserve to be published is far worse.

The evening ended for me on a very special note – good, but sad. About 50 lithographers gathered at Gordon Biersch and at 9pm raised a glass of beer in honor of Jeff Byers. At many other restaurants and bars around town, other lithographers were doing the same thing. We miss you Jeff – you are gone but not forgotten.

The SPIE Advanced Lithography Symposium – Day 3

My favorite phrase of the conference: “Double half-pitch”. Now, one might think that this was just a silly way of saying “pitch” (and as we found out last year, the pitch is not necessarily twice the half-pitch), but no. The speaker meant “quarter-pitch”, as if “half” was a mathematical operator rather than a fraction. Even scientists and engineers, trained in precision, can become experts at obfuscation.

The Advanced Lithography Symposium is cyclic. Every few years, some good idea or ideas capture the imagination of the community. These are “innovation” years. Then, for the next several years, people work out the details as they either embrace, or reject, those ideas. Such “development” years are more common, and often result in industry consensus around various technologies. This year seems to be a development year. Double pattern is looking more and more practical, and certainly the memory makers have already decided to use it. Logic makers are still holding out hope for high-index materials and higher numerical apertures. LuAg is making progress, but absorbance is still an order of magnitude away from its target. The last order of magnitude improvement is always the hardest (something I think the EUV folks will soon learn), so the use of LuAg is not a forgone conclusion. Second generation fluids seem to be becoming practical, though third generation fluids look even further away than I had expected. “Development” years are not as exciting as “innovation” years at this conference, but that’s OK. Too much excitement can be a bad thing.

My biggest fear for continued lithographic progress remains line-edge roughness. Progress in understanding LER is far too slow for my likes. I’m surprised and disappointed in the limited attention that this problem is receiving compared to tool development issues.

A Reminder: At 9pm on Thursday, friends of Jeff will raise a glass in his honor. If you are at Gordon Biersch, we’ll do it together. If not, please do it wherever you are.

Becoming a Lithographer, part 2

Believe it or not, I started my first lithography company while I was in high school. My parents had moved our family to Texas in order to start a business, so the idea of starting my own business just seemed natural to me. After giving up on my first idea of a used book store, I settled on printing T-shirts. The silk-screen process begins with using contact printing on a photographic emulsion on the screen. Both resolution for fine lines and overlay for four-color printing were important. Still, I spent most of my time worrying about defects (the emulsion getting beat up during screening) and turn-around time (customers can be so demanding). In the end, lithographic quality didn’t matter much as my business acumen was insufficient to allow my survival. It didn’t occur to me that this was my first lithography job until many, many years later, since I certainly didn’t use the word “lithography” (or even know what it meant) until after I got into the semiconductor industry.

I suppose that the failure of my first business was inevitable, since I was soon bound for college anyway (though I was able to make some extra money in college by printing T-shirts and hats for various campus groups). In high school I was a good student, but it was in college, at Rose-Hulman Institute of Technology, that I found my groove. I graduated four years later with four bachelor degrees (physics, chemistry, electrical engineering, and chemical engineering).

Next Time: my failure in graduate school, and how it led to a career in semiconductor lithography

The SPIE Advanced Lithography Symposium – Day 2

This was a day of full technical meetings. In the morning I sat in on the optical lithography conference where I saw better-than-expected progress on double patterning. I was particularly impressed with the quality of the litho “freeze” images. In the afternoon I sat in on the resist conference, where I was particularly unimpressed with the lack of progress in the understanding of line edge roughness. This is not a good sign.

I didn’t attend the EUV session of the emerging conference, though I saw the crowd of people flowing out of the door. Several people asked me what I thought of the AMD/ASML/IBM paper showing a working device with a layer made using EUV lithography. Since I didn’t see the paper, I couldn’t comment on it, though I was immediately reminded of a paper I saw many years ago, where IBM demonstrated a device with one critical layer imaged with proximity X-ray lithography. Shortly after that device demonstration, IBM canceled their X-ray program.

In the early evening, there was a panel discussion called “Future Projection Lithography: Optical or EUV?” Since I already knew the answer, I skipped the panel and went straight to the hospitality suites.

The hospitality suite scene seemed subdued this year. Everything was low-key (and occasionally dead) at normally hoping parties. Still, it was nice to wander around and socialize – one of the key benefits of this symposium. I ended the evening at the KLA-Tencor “bathtub” party put on by the PROLITH team. Good times, and good memories evoked. Packing it in at 11pm, I tried not to think of the 7am breakfast meeting I had scheduled for the next day – that’s life at SPIE.

Becoming a Lithographer, part 1

I didn’t grow up saying I wanted to be a lithographer – does anybody? So, like most of us lithographers, I came to my profession the old fashion way – by accident. The story of how I became a lithographer is a relatively short one, so I’ll make it long by adding lots of extraneous details.

My first real job, at age 16, was working for my father in the construction business. He gave me all the dirtiest jobs: digging ditches, laying tie-rod for concrete, running a jack hammer, doing demo (demolition) work. That summer in Dallas saw 41 days in a row above 100F, and I never saw my dad slow down. It was a relief when school started again in the fall, and I decided that when I got to college I was going to work really hard! I few years ago I told this story to my dad. His only response: “It worked”.

During this same time, my mother and her sister-in-law had started a fabric store (the early seeds of an entrepreneurial spirit?). I helped out a bit there, so that by the end of that year I was the only kid I knew who could run a jack hammer and make his own shirts.

Next Time: my first “lithography” job

The SPIE Advanced Lithography Symposium – Day 1

I’ll begin on a serious note. This past year saw the passing of a great lithographer and good friend, Jeff Byers. His tragic death in November (due to injuries sustained in an auto accident) is still a shock to me. So I’m starting a viral campaign: anyone who feels a need to take a moment to honor Jeff’s memory, let’s meet at Gordon Biersch on Thursday, and at 9 pm raise a glass for him. I think he would have done the same for me.

The Symposium began with the awards before the plenary talks. The Frits Zernike prize was awarded to Martin van den Brink of ASML (way to go, Martin!), followed by the promotion of a record 8 lithographers to the rank of SPIE fellow. There were 21 lithography fellows before, so this is a big increase.

All three plenary talks were reasonably good – something that rarely happens. Here are my favorite quotes:

“ Lithography choices are critical and dangerous” – Mark Durcan, Micron
“Shrink is good.” – Martin van den Brink, ASML
“Designers need freedom from choice.” – Andrew Kahng, UC San Diego

With the start of regular talks, the exercise began. I raced back and forth between the resist and metrology sessions all day – probably 200 yards apart. My two big take-aways for the day: 1) third-generation high-index fluids (n > 1.8) may never have low enough absorption, and 2) metrology folks my know how to build metrology tools, but their analysis of data is relatively crude (and they are proud of it).

During the resist session, Ralph Dammel made a very nice tribute to Jeff Byers just before a paper in which Jeff was a co-author. Thank you, Ralph.

The Monday evening poster session was a mess as always. Too many people in a too-small space meant it was virtually impossible to visit even a small fraction of the posters. But as an experienced poster maven, I was prepared. I went through the posters an hour before the session opened and just dropped my card at any poster that looked interesting. I’ll read the papers when the authors email them too me. Then the poster session became a social event – something it works well as.

The SPIE Advanced Lithography Symposium – Day 0

It’s that time of year again – the SPIE Advanced Lithography Symposium in sunny San Jose, California (so far, it’s been raining constantly since I arrived). Attendance is expected to be about 4,000 again this year, with about 700 papers in five parallel conferences, and over 82,000 bottles of beer consumed (all right, I made that last number up).

As usual, I plan to blog each day about my impressions of the conference. It’s Sunday night, and I just finished teaching an 8 hour class (something I’ve been doing here for over 15 years) as a rolling start to the symposium. So it is with both tired feet and a sore voice that I’ll start off the conference tomorrow by attending the plenary session.

And I’m feeling nostalgic this year. In February of 1983 I started my first job in semiconductor lithography. Now it is 25 years later, and yes, I am feeling just a little bit older, a little bit wiser, and more than a little bit self-absorbed (if you don’t believe me, just check out my website). What I don’t feel like is finished. There are so many interesting problems to work on in lithography! There is so much work yet to do. My dilemma this year is not much different from my dilemmas of the past – of all the interesting things to work on, which one first?

But nonetheless, I think I’ll take this 25 year anniversary as an opportunity to tell a story: just exactly how did I manage to find myself working in the field of lithography? After all, when I was first told I was going to work on lithography, I had to look up the spelling of the word. My path to where I am now is anything but direct. So, in “installment” form over the next few days, I’ll tell the story of how I become a lithographer.

Two words I do not like

A couple of blog entries ago, I mentioned two words that I like. Now, here are two words that I definitely don’t like: methodology and utilize. Both are examples of word inflation, and I don’t like word inflation. Why use a big word when a small word would work just as well? Utilize means use – there is no difference and, in my opinion, no reason to ever use “utilize”. Whenever I come across a writer or speaker who has no reason to utilize “use”, I am unlikely to pay attention. The abundant use of the word “methodology” is even worse. Methodology is the study of methods, but most people use it incorrectly as a synonym for “method”. (I’m embarrassed to say that I actually used the word “methodology” once in my recent book Fundamental Principles of Optical Lithography – I am anxiously awaiting the second printing so that I can correct my miserable mistake.)

Small words, when conveying the proper meaning, are always more effect at that conveyance. Big words, when used to impress, have the exact opposite effect on me. Trust me – if you utilize this methodology, you can’t go wrong.