SPIE Advanced Lithography 2015 – day 2

It’s been a long time since a lithography conference was just about lithography. Last year TSMC gave a talk that described problems they were having with EUV lithography and ASML’s stock price went down 5%. Yesterday (Monday), Tony Yen of TSMC gave a talk describing very nice progress on source power and throughput and ASML’s stock price went up 5%. Is it a good thing that so many stock analysts attend these talks? It doesn’t help that ASML had a press release ready to go and sent it out just minutes after Tony had finished (Title: “ASML announces new high mark for EUV productivity; TSMC images more than 1000 wafers in a single day”). About half a dozen analyst blogs were crowing about the importance of what Tony said, one even counting the number of times he mentioned KLA-Tencor. This puts a lot of pressure on scientists and engineers giving technical talks to focus on things that aren’t technical, and that is pressure we do not want or need. I guess there is nothing to be done – it is just reality. But I don’t like it.

My Tuesday was far from such earth-shaking events. I buried myself deep in the rough landscape of stochastic resist response, line-edge roughness (LER), and how to measure noise. Fascinating, but don’t expect a stock analyst to be parsing any of my words on the topic. There were several attempts to simulate the impact of roughness on SEM linewidth measurement, with important insights. Richard Lawson of Georgia Tech showed that roughness on a vertical feature sidewall produces SEM images that look just like smooth sidewalls that are sloped. There is a lot of information in an SEM image, but maybe less than we hope. My 8am paper was about how to extract the most information possible from an SEM image, and that our current measurement algorithms don’t take advantage of everything we know about how those images are generated. As I said Monday night, build better metrology. We desperately need it.

My third and last paper was Tuesday afternoon, where I gave a mathematical proof that post-lithography process smoothing techniques won’t work, at least not as well as we need them to. Like all mathematical proofs, its validity will depend on the validity of my assumptions. I hope that those who believe in the efficacy of post-process smoothing will design experiments that directly challenge those assumptions instead of just showing SEM images and reporting reduced three-sigma roughness numbers.

The conference is half-way done!

2 thoughts on “SPIE Advanced Lithography 2015 – day 2”

  1. I want to know about HVM by NIL . Do you have any comments on presentations of Toshiba ,Canon,Canon Nanotech. ?

  2. TSMC said in Q1 2015 that their average EUV throughput was actually only few hundred wafers per day, so what was special about this 1000 wpd demo?

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